This invention relates generally to semiconductor components, and relates more particularly to transistors and methods of manufacture.
The metal-oxide semiconductor field-effect transistor (MOSFET) enjoys widespread use in a large number of electronics technologies. The lateral double diffused power MOSFET (LDMOS) device is heavily used in smart power technologies where device size is at a premium. The small size and high complexity of LDMOS devices makes them especially vulnerable to electrostatic discharge (ESD) strikes, in which large currents are suddenly forced onto an LDMOS device. ESD strikes are of particular concern for medium sized, 30-50 volt (V) LDMOS devices, especially in the 2-ohm to 20-ohm range, which are connected to high voltage pads in various automotive and consumer applications such as air bag deployment systems and printer head drivers. If an LDMOS device is left unprotected, an ESD strike can lead to thermally-induced soft degradation of leakage current from low pre-stress levels due to current crowding, which can cause non-uniform heating and localized silicon melting damage in the vicinity of the drain.
Conventional ESD-protected LDMOS devices are either self-protected, meaning the ESD-protection arises from some feature internal to the LDMOS device itself, or externally-protected, meaning the ESD-protection is accomplished outside of the LDMOS. Typical self-protected devices rely on the engineering of semiconductor regions. As an example, the volume of the body region enclosing the source region of an LDMOS may be increased, but this approach leads to the unwanted result of increasing overall device size. As another example, the doping level of the body region may be increased, but this approach increases the threshold voltage, which is also an unwanted result. As still another example, the drift length of the LDMOS may be increased. This too increases the size of the device, typically by a factor of two or three.
The external protection methods are equally problematic. External ESD protection in a conventional LDMOS device is achieved by providing zener diodes, capacitors, and/or other circuit elements in various circuit configurations with the LDMOS device in order to absorb the ESD energy. The added circuit elements increase the overall area consumption of the LDMOS device, just as do the conventional self-protection approaches. In addition, external ESD protection is difficult to design, due to a narrow voltage window between the maximum rated pad voltage and the breakdown voltage of the LDMOS device.
Accordingly, there is a need for an ESD-protected semiconductor device that does not rely on increases in size or doping level for such protection. Ideally, the ESD-protected LDMOS device would be more robust in terms of ESD protection than existing devices, and would fit into existing manufacturing flows.